This paper proposes a single-phase five-level INVERTER with a modified pulse width-modulated (PWM) control scheme. The modified pulse width-modulation technique is developed to reduce switching losses. Also, the proposed multilevel INVERTER can reduce the requirement of power switches compared to a conventional cascaded multilevel INVERTER. The modes of operation, control signals, and operating principle of the proposed INVERTER are analyzed. The INVERTER is capable of producing five levels of output-voltage (Vs, Vs / 2, 0, − Vs, − Vs/2) from the dc supply voltage. In particular, aspects of total harmonic distortion (THD) for the proposed multilevel converters are discussed. The hybrid cascaded H-Bridge INVERTER with very low switching losses is ideal for such operations. The behaviour of the INVERTER has been analyzed with the simulation and experimental results. In this paper a new five level INVERTER with reduced number of switches is proposed and MATLAB/SIMULINK results are presented.

INVERTERs have been widely used in renewable energy as a means of converting extracted power to grid standards. However, this power electronics equipment is highly vulnerable to failures due to its complex architecture and components. One of the main sources of failure is semiconductor switches that are critically sensitive to abnormal conditions such as high voltage. With the advent of multilevel INVERTERs, this concern has been raised considerably due to the increase in the number of switches. This paper has proposed a novel method with a neural network that can detect open circuit failure of switches and replace them with some new arrangement in the INVERTER so that it can run effectively. Simulations with MATLAB/Simulink for a seven level INVERTER, illustrate that with a switch failure, the multilevel INVERTER can work successfully. Results also demonstrate that this method is fast and can compensate for the output in less than two cycles. Therefore, it can be used in reliable multilevel applications in which the power flow should be achieved even if a semiconductor switch is broken.

Background and Objectives: To overcome the disadvantages of the traditional two-level INVERTERs, especially in electric drive applications, MULTI-LEVEL INVERTERs (MLIs) are the widely accepted solution. Diode-Clamped INVERTERs (DCIs) are a well-known structure of MULTI-LEVEL INVERTERs. In DCIs, the voltage balance of the DC-link capacitors and the Common Mode (CM) voltage reduction are two important criteria that should be considered. Methods: This paper concentrates on the current control of 3-phase 4-level DCI with finite control set model predictive control (MPC) strategy. Current tracking performance, DC-link capacitor voltage balance, switching frequency minimization, and CM voltage control have been considered in the objective function of the MPC. Moreover, the multistep prediction method has been applied to improve the performance of the DCI. Results: The effectiveness of the proposed multistep prediction control for the 4-level DCI has been evaluated with different horizon lengths. Moreover, the effect of several values of weighting factors has been studied on the system behavior. Conclusion: Results validate the accuracy of current tracking and voltage balancing in the suggested multistep MPC for the 4-level DCI. In addition, CM voltage control and switching frequency reduction can be included in the predictive control. Decreasing the CM voltage and switching frequency will oppositely affect the dynamic behavior and voltage balancing of the DCI. Therefore, selection of weighting factors depends on the system needs and requirements.

As a major component of electrical systems, multilevel INVERTERs have been discussed extensively over the past decade. Nowadays, the improvement of their performance is one of the important challenges that has brought about many studies on their topology and control system. This paper proposes a new topology of symmetrical MULTI-LEVEL INVERTERs that is able to feed inductive, resistive and capacitive loads. The proposed topology has fewer power elements including IGBTs, driver circuits, diodes, and DC voltage sources. To increase the number of output voltage levels, several basic topologies can be used in a cascaded structure. The comparison of the proposed converter with some previous topologies shows its better conditions in terms of the used semiconductor count, switching and conduction losses, and total blocking voltage. The operation and performance of the proposed MULTI-LEVEL INVERTER are ascertained by simulations and are verified experimentally for a 9-level INVERTER, showing the capability of the proposed converter in smooth sinusoidal output voltage generation with a minimum total harmonic distortion.

In this paper, a new structure for cascade multilevel INVERTER is presented which consists of a series connection of several sub-multilevel units. Each sub-multilevel unit comprises of eight unidirectional switches, two bidirectional switches, and six DC voltage sources. For the proposed cascade topology, two algorithms are presented to produce all possible levels at the output voltage waveform. The required analysis of the voltage rating on the switches is provided. In order to verify the performance of the proposed INVERTER, the experimental results for a 15-level INVERTER are provided. The experimented 15-level INVERTER is compared with the other presented INVERTERs in literature in terms of the number of DC voltage sources, switches, drivers, and blocked voltage by switches. The results of comparisons indicate that the experimented 15-level INVERTER requires lower power electronic elements. Moreover, the blocked voltage on the switches of the proposed topology is less than other topologies.

In this paper, a new basic unit is proposed for multilevel INVERTERs. Then, a series connection of the proposed basic unit is used to recommend a new topology for multilevel INVERTERs. To determine the magnitude of dc voltage sources, a new algorithm is presented. For the proposed algorithm, different performance parameters such as total voltage rating of switches (TVRS), number of gate drivers, and number of required sources are calculated as a function of the number of output voltage levels and are compared with other topologies. The comparison proves that the proposed cascaded topology requires fewer components and gate driver circuits than most of the other conventional topologies. Moreover, the voltage rating of switches is less than the other topologies which result lower cost and control complexity. Finally, the correctness of the theoretical analysis and the performance of the proposed INVERTER are verified using the laboratory and simulation results under different scenarios.

In this paper, a new configuration for symmetrical and asymmetrical multilevel INVERTERs is proposed. In asymmetric mode, different algorithms are suggested in order to determine the magnitudes of DC voltage sources. The merit of this topology to the conventional symmetric and asymmetric INVERTERs is verified by the provided comparisons. This topology uses a lower number of power electronic devices such as switches, IGBTs, diodes, related gate driver circuits and DC voltage sources. Owing the lower amount of requirements, it has lower total costs and needs less installation area. Also the control strategy has less complexity. The proposed converter can generate all the desired output voltage levels with positive and negative values. To confirm the practicability of the proposed INVERTER, simulation and experimental results are provided which are in good agreements.

In this paper, a new structure of HFTI-qZS-CMI has been proposed. The proposed structure is capable of generating high-voltage for medium to high power applications. By adding a switch, a capacitor and a high-frequency transformer and also eliminating an inductor from each qZS-CMI cell, the HFTI-qZS-CMI structure will be created. Using the high-frequency transformer in the proposed structure, leads to electrical isolation between the input and the output, increase or decrease the output voltage, increase the system reliability and reduce the electromagnetic interference. The number of elements in the proposed structure is less than three stage cascade multilevel INVERTER. Moreover, in comparison to the qZS-CMI with the same input and output voltages, it has lower voltage stress on the diode and the switches as well as higher boost factor and larger modulation index. To control the on and off state of the switches, the Improved phase-shifted sinusoidal pulse width modulation with third harmonic injection is used which increases the modulation index more than one and improve the quality of INVERTER output power. The proposed structure simulation has been carried out in MATLAB / SIMULINK software. The results of analysis and simulation show better performance for the proposed INVERTER comparing to other structures.